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L5965 Datasheet(PDF) 62 Page - STMicroelectronics

Part # L5965
Description  Power management for automotive vision and radar systems
PDF  73 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L5965 Datasheet(HTML) 62 Page - STMicroelectronics

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6.11
Power up programming
According to the data written in OTP cells, we can have different power up phases. The meaning of OTP bits
code is the following:
Main BUCK selection : main regulator, BUCK1 (OTP = 101) or BUCK2 (OTP = 110), is turned on only by
WKUP signal
Other regulators (BUCK1 or BUCK2, BUCK3, BUCK4, BOOST, LDO and VREF) turning on order, from
second to the seventh one:
000 = regulator is turned on only by SPI enable signal
001 = regulator is turned on after Main regulator (second regulator)
010 = regulator is turned on as third one
011 = regulator is turned on as fourth one
100 = regulator is turned on as fifth one
101 = regulator is turned on as sixth one
110 = regulator is turned on as seventh one
111 = regulator is turned on only by SPI enable signal
Two regulators with the same order number is not allowed, except for 000 or 111 code. Enable bit in OTP cells
(EnBuck3/4, EnLDO, EnBoost and EnVref) must be set to '1' too, to have the regulator ON in ACTIVE phase. All
the regulators with 111 code can be turned on in ACTIVE mode, when the SPI is available.
Regulators turning on delay after Power Good: the delay is the same for all the regulators.
00 = no delay
01 = 2 ms after PGOOD of previous regulator
10 = 5 ms after PGOOD of previous regulator
11 = 10 ms after PGOOD of previous regulator
Reset activation related to the right regulator Power Good (3 bits)
000 = Reset release after PGOOD of Main BUCK with a delay from 0 (no delay) to 10 ms (2bits)
001 = Reset release after PGOOD of the second regulator with a delay from 0 (no delay) to 10 ms
(2bits)
110 = Reset release after PGOOD of the last regulator with a delay from 0 (no delay) to 10 ms
(2bits)
111 = Reset release when ACTIVE state is reached (unconditional Reset release)
Figure 29. Power up sequence
INIT
SEC UP
VREG_OK
VREG
T < texp
BUCK
PG_BUCK
RAMPUP
BUCK
GAPG1002161613PS
L5965
Power up programming
DS12567 - Rev 3
page 62/73



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