PAC1933T-ISLASHJQ. datasheet(47/62 Pages) MICROCHIP

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DS20005850C-page 47

PAC1932/3/4

CHANNEL DIS_ACT (ADDRESS 22H)

R-0

CH1_OFF

CH2_OFF

CH3_OFF

CH4_OFF

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writeable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = bit is set

‘0’ = Bit is cleared

x = Bit is unknown

This register contains an image of the Channel Disable bits in register 1Ch.The bits in this register reflect the value

that was activated by the most recent REFRESH function, and is currently active. Whereas the values in register 1Ch

may have been programmed but not activated by one of the REFRESH commands, register 22h allows software to

determine the actual active setting. This register is valid when the Results registers are valid, 1 ms after a

REFRESH/_V/_G command.

bit 7-4

CHn_OFF<7:4>

: shows the value that is currently active for these bits.

bit 7

= CH1 ON. Channel 1 active during conversion cycle

= CH1 OFF. Channel 1 inactive during conversion cycle

bit 6

= CH1 ON. Channel 2 active during conversion cycle

= CH1 OFF. Channel 2 inactive during conversion cycle

bit 5

= CH1 ON. Channel 3 active during conversion cycle

= CH1 OFF. Channel 3 inactive during conversion cycle

bit 4

= CH1 ON. Channel 4 active during conversion cycle

= CH1 OFF. Channel 4 inactive during conversion cycle

bit 3-0

Not used, always reads ‘0’

NEG_PWR_ACT (ADDRESS 23H)

R-0R-0

CH1_BIDI

CH2_BIDI

CH3_BIDI

CH4 BIDI

CH1_BIDV

CH2_BIDV

CH3_BIDV

CH4_BIDV

bit 7

bit 0

Legend:

R = Readable bit

W = Writeable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = bit is set

‘0’ = Bit is cleared

x = Bit is unknown

This register contains an image of the NEG_PWR register, 1Dh.The bits in this register reflect the current active value

of these settings, whereas the values in register 1Dh may have been programmed but not activated by one of the

REFRESH commands. This register allows software to determine the actual active setting. This register is valid when

the Results registers are valid, 1 ms after a REFRESH/_V/_G command.

bit 7-4

CH1_BIDI<7:4>

: these bits show the current active value of the corresponding bits in Register 6-11,

NEG_PWR (Address 1Dh).

bit 3-0

CH1_BIDV<3:0>

: these bits show the current active value of the corresponding bits in Register 6-11,

NEG_PWR (Address 1Dh).

bit 7

= Channel 1 VSENSE ADC converts 0 to +100 mV range with 16-bit straight binary output

= Channel 1 VSENSE ADC converts -100 mV to +100 mV range with 16-bit two’s complement output

bit 6

= Channel 2 VSENSE ADC converts 0 to +100 mV range with 16-bit straight binary output

= Channel 2 VSENSE ADC converts -100 mV to +100 mV range with 16-bit two’s complement output

bit 5

= Channel 3 VSENSE ADC converts 0 to +100 mV range with 16-bit straight binary output

= Channel 3 VSENSE ADC converts -100 mV to +100 mV range with 16-bit two’s complement output

bit 4

= Channel 4 VSENSE ADC converts 0 to +100 mV range with 16-bit straight binary output

= Channel 4 VSENSE ADC converts -100 mV to +100 mV range with 16-bit two’s complement output

PAC1933T-I/JQ. Datasheet(PDF) 47 Page - Microchip Technology

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