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AD4081BBCZ Datasheet(PDF) 27 Page - Analog Devices |
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AD4081BBCZ Datasheet(HTML) 27 Page - Analog Devices |
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27 / 95 page  Data Sheet AD4081 THEORY OF OPERATION analog.com Rev. 0 | 27 of 95 3. Software reset initialization will require 300us. During this ini- tialization time, reading the NOT_READY_ERR in the INTER- FACE_STATUS_A register will return a 1 until the initialization is complete. Once the software reset initialization is complete, the part is now reset and NOT_READY_ERR will return to 0. SPI configuration writes will be ignored while during this initialization when NOT_READY_ERR is set to 1. This action returns any previously configured registers to their default settings, except for the ADDR_ASCENSION bit from the Interface Configuration A register, which keeps its previous value. The contents of the FIFO, if any, are also not affected by the soft- ware reset. The ADDR_ASCENSION bit and FIFO data only return to their default settings after a hardware reset or a full power-up happens. NOT_READY_ERR flag of the INTERFACE_STATUS_A register (0x11) will assert if 300us minimum time after setting software reset bits (SW_RESET & SW_RESETX) is breached. |
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