IS25LP02GJ-RHLA3 datasheet(94/182 Pages) ISSI

Part #	IS25LP02GJ-RHLA3

Description	SERIAL FLASH MEMORY 166MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE

PDF	182 Pages

Scroll/Zoom	100%

Manufacturer	ISSI [Integrated Silicon Solution, Inc]

Direct Link	http://www.issi.com

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94 / 182 page

IS25LP02GJ

IS25WP02GJ

Integrated Silicon Solution, Inc.- www.issi.com

Rev.A

10/02/2025

8.17 WRITE ENABLE OPERATION (WREN, 06h)

The Write Enable (WREN) instruction is used to set the Write Enable Latch (WEL) bit. The WEL bit is reset to the

write-protected state after power-up. The WEL bit must be write enabled before any write operation, including

Sector Erase, Block Erase, Chip Erase, Page Program, Program Information Row, Write Status Register, Write

Function Register, Set Non-Volatile Read Register, Set Non-Volatile Extended Read Register, Set Volatile Read

automatically upon completion of a write operation. The WREN instruction is required before any above operation

is executed.

Figure 8.42 Write Enable Sequence In SPI Mode

Instruction = 06h

CE#

SCK

Mode 3

Mode 0

High Impedance

Figure 8.43 Write Enable Sequence In QPI Mode

06h

CE#

SCK

IO[3:0]

Mode 3

Mode 0

IS25LP02GJ-RHLA3 Datasheet(PDF) 94 Page - Integrated Silicon Solution, Inc