CYWUSB6932
CYWUSB6934
Document 38-16007 Rev. *I
Page 21 of 30
Addr: 0x2F
REG_CARRIER_DETECT
Default: 0x00
7
654
3210
Carrier Detect
Override
Reserved
Figure 7-28. Carrier Detect
Bit
Name
Description
7
Carrier Detect Override
When set, this bit overrides carrier detect. The user must set Reg 0x20, bit 6=1 to enable writes to Reg 0x2F.
6:0
Reserved
These bits are reserved and should be written with zeroes.
Addr: 0x32
REG_CLOCK_MANUAL
Default: 0x00
7
654
3210
Manual Clock Overrides
Figure 7-29. Clock Manual
Bit
Name
Description
7:0
Manual Clock Overrides
This register must be written with 0x41 after reset for correct operation
Addr: 0x33
REG_CLOCK_ENABLE
Default: 0x00
7
654
3210
Manual Clock Enables
Figure 7-30. Clock Enable
Bit
Name
Description
7:0
Manual Clock Enables This register must be written with 0x41 after reset for correct operation
Addr: 0x38
REG_SYN_LOCK_CNT
Default: 0x64
7
654
3210
Count
Figure 7-31. Synthesizer Lock Count
Bit
Name
Description
7:0
Count
Determines the length of delay in 2µs increments for the synthesizer to lock when auto synthesizer is enabled via Control register
(0x03, bit 1=0) and not using the PLL lock signal. The default register setting is typically sufficient.
Addr: 0x3C-3F
REG_MID
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
1
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
98
76543
210
Address 0x3F
Address 0x3E
Address 0x3D
Address 0x3C
Figure 7-32. Manufacturing ID
Bit
Name
Description
31:30 Address[31:30] These bits are read back as zeroes.
29:0
Address[29:0]
These bits are the Manufacturing ID (MID) for each IC. The contents of these bits cannot be read unless the MID Read
Enable bit (bit 5) is set in the Analog Control register (Reg 0x20). Enabling the Manufacturing ID register (Reg
0x3C-0x3F) consumes power. The MID Read Enable bit in the Analog Control register (Reg 0x20, bit 5) should only
be set when reading the contents of the Manufacturing ID register (Reg 0x3C-0x3F). This register is read-only.
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