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MPC8309CVMADFCA Datasheet(PDF) 3 Page - NXP Semiconductors |
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MPC8309CVMADFCA Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 81 page ![]() MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 3 Freescale Semiconductor 3 Overview 1.1 Features The major features of the device are as follows: • e300c3 Power Architecture processor core — Enhanced version of the MPC603e core — High-performance, superscalar processor core with a four-stage pipeline and low interrupt latency times — Floating-point, dual integer units, load/store, system register, and branch processing units — 16-Kbyte instruction cache and 16-Kbyte data cache with lockable capabilities — Dynamic power management — Enhanced hardware program debug features — Software-compatible with Freescale processor families implementing Power Architecture technology — Separate PLL that is clocked by the system bus clock — Performance monitor • QUICC Engine block — 32-bit RISC controller for flexible support of the communications peripherals with the following features: – One clock per instruction – Separate PLL for operating frequency that is independent of system’s bus and e300 core frequency for power and performance optimization – 32-bit instruction object code – Executes code from internal IRAM – 32-bit arithmetic logic unit (ALU) data path – Modular architecture allowing for easy functional enhancements – Slave bus for CPU access of registers and multiuser RAM space – 48 Kbytes of instruction RAM – 16 Kbytes of multiuser data RAM – Serial DMA channel for receive and transmit on all serial channels — Five unified communication controllers (UCCs) supporting the following protocols and interfaces: – 10/100 Mbps Ethernet/IEEE Std. 802.3® through MII and RMII interfaces. – IEEE Std. 1588™ support – HDLC/Transparent (bit rate up to QUICC Engine operating frequency / 8) – HDLC Bus (bit rate up to 10 Mbps) – Asynchronous HDLC (bit rate up to 2 Mbps) – Two TDM interfaces supporting up to 128 QUICC multichannel controller channels, each running at 64 kbps |
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