M29W512B datasheet(2/18 Pages) STMICROELECTRONICS

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M29W512B

2/18

Figure 2. TSOP Connections

DQ0

A13

A10

DQ7

A14

A11

DQ5

DQ1

DQ2

DQ3

DQ4

DQ6

A12

VCC

A15

AI02976

M29W512B

VSS

Table 1. Signal Names

A0-A15

Address Inputs

DQ0-DQ7

Data Inputs/Outputs

Chip Enable

Output Enable

Write Enable

VCC

Supply Voltage

VSS

Ground

Not Connected Internally

SUMMARY DESCRIPTION

The M29W512B is a 512 Kbit (64Kb x8) non-vola-

tile memory that can be read, erased and repro-

grammed. These operations can be performed

using a single low voltage (2.7 to 3.6V) supply. On

power-up the memory defaults to its Read mode

where it can be read in the same way as a ROM or

EPROM.

Program and Erase commands are written to the

Command Interface of the memory. An on-chip

Program/Erase Controller simplifies the process of

programming or erasing the memory by taking

care of all of the special operations that are re-

quired to update the memory contents. The end of

a program or erase operation can be detected and

any error conditions identified. The command set

required to control the memory is consistent with

JEDEC standards.

Chip Enable, Output Enable and Write Enable sig-

nals control the bus operation of the memory.

They allow simple connection to most micropro-

cessors, often without additional logic.

The memory is offered in TSOP32 (8 x 14mm) and

PLCC32 packages and it is supplied with all the

bits erased (set to ’1’).

Figure 3. PLCC Connections

AI02755

A13

A10

DQ0

DQ7

A14

M29W512B

A11

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