CHR71000 datasheet(39/54 Pages) AMSOSRAM

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CHR71000

Functional description

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7.6

Reading out the sensor

7.6.1

Analog data output

The CHR71000 image sensor has 16 internal output channels which are multiplexed to 8

parallel outputs (OUT_0 to OUT_7).

7.6.2

Timing of chip outputs

There are two digital outputs available that assist frame grabbing. The output OUT_LVAL

indicates when valid pixel information is available at the outputs (see Figure 21). The output

OUT_CLK_SMP is a sampling clock with the same frequency as the master input clock. This

signal can be used to drive external ADC's to ensure correct signal sampling.

Figure 21: Timing of OUT_CLK_SMP and OUT_LVAL signals

The OUT_LVAL signal is only pulsed when using the internal sequencer. If the sequencer is

disabled, it will be '0' continuously.

The output signal OUT_LVAL can be delayed in steps of 1 master clock cycle. This could be

used to incorporate the delay of the data path external to the sensor in the timing of

OUT_LVAL. The register for this delay value is register 17 (reg_del_lval).

When using external timing, you can use the CLK_Y, SYNC_Y_READ and the SYNC_X

pulses to know when data is being output. The data read out starts 4 clock pulses after

SYNC_X.

CLK_IN

OUT_LVAL

OUT[0]

PIX 0

PIX 8

...

PIX n-16 PIX n-8

OUT_CLK_SMP

OUT[7]

PIX 7

PIX 15

...

PIX n-9

PIX n-1

CHR71000 Datasheet(PDF) 39 Page - ams-OSRAM AG