SS1621
p. 7
Last update: 2008-06-03 04:36
Functional Description
Display memory – RAM
The static display memory (RAM) is or-
ganized into 32x4 bits and stores the dis-
played data. The contents of the RAM are di-
rectly mapped to the contents of the LCD
driver. Data in the RAM can be accessed by
the
READ,
WRITE,
and
READ-MODIFY-WRITE commands. The
following is a mapping from the RAM to the
LCD pattern:
System oscillator
The SS1621 system clock is used to
generate the time base/Watchdog Timer
(WDT) clock frequency, LCD driving clock,
and tone frequency. The source of the clock
may be from an on-chip RC oscillator
(256kHz), a crystal oscillator (32.768kHz), or
an external 256kHz clock by the S/W setting.
The configuration of the system oscillator is
as shown. After the SYS DIS command is
executed, the system clock will stop and the
LCD bias generator will turn off. That com-
mand is, however, available only for the
COM3
COM2
COM1
COM0
SEG0
0
SEG1
1
SEG2
2
SEG3
3
SEG31
31
D3
D2
D1
D0
Data
Addr
Address 6 bits
(A5, A4, …, A0)
Data 4 bits
(D3, D2, D1, D0)
RAM mapping
Crystal Oscillator
32768Hz
External Clock Source
256kHz
On-chip RC Oscillator
256kHz
OSCI
OSCO
1/8
System
Clock
System oscillator configuration
90%
50%
10%
tCLK
tf
tf
tCLK
GND
VDD
Figure 1
50%
tsu1
th1
tCS
GND
VDD
Figure 3
GND
VDD
50%
FIRST
Clock
LAST
Clock
50%
th
VALID DATA
GND
VDD
Figure 2
GND
VDD
50%
DB
tSU
WR, RD
Clock
WR, RD
Clock
WR, RD
Clock
CS
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