ST5080D datasheet(14/32 Pages) STMICROELECTRONICS

14 / 32 page

Table 2: Control Register CR0 Functions

76543

Function

MCLK = 512 kHz

MCLK = 1.536 MHz

MCLK = 2.048 MHz

MCLK = 2.560 MHz

(1)

Select MU-255 law

A-law including even bit inversion

A-law; No bit inversion

Delayed data timing

Non delayed data timing

(1)

B1 and B2 consecutive

B1 and B2 separated

(1)

8 bits time-slot

7 bits time-slot

Normal operation

Digital Loop-back

state at power on initialization

(1):

significant in COMBO I/II mode only

Table 3: Control Register CR1 Functions

65432

Function

HFE ALE

HFO / HFI pins disabled

HFO / HFi pins enabled

Anti-larsen disabled

Anti-larsen enabled

L0 latch is put in high impedance

L0 latch set to 0

DR connected to rec. path

CR2 connected to rec. path

(1)

Trans path connected to DX

CR3 connected to DX

(1)

voice data transfer disable

voice data transfer enable

B1 channel selected

B2 channel selected

B1* channel selected

B2* channel selected

(2)

state at power on initialization

(1):

significant in COMBO I / II mode only

(2):

significant in GCI mode only.

ST5080A

14/32

ST5080D Datasheet(PDF) 14 Page - STMicroelectronics

ST5080D Datasheet(HTML) 14 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL