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STR910FAW32 Datasheet(PDF) 65 Page - STMicroelectronics |
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STR910FAW32 Datasheet(HTML) 65 Page - STMicroelectronics |
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65 / 101 page  STR91xFAx3x, STR91xFAx4x Electrical characteristics 65/101 7.7 Clock and timing characteristics Table 17. Internal clock frequencies Symbol Parameter Conditions Value Unit Min Typ Max fMSTR CCU Master Clock 32.768 fCPUCLKmax kHz fCPUCLK CPU Core Frequency Executing from SRAM 96 MHz Flash size ≤ 512 KB Executing from Flash 96 MHz Flash size = 1 MB / 2 MB, executing from SRAM or Flash (except RWW) VDD ≥ 1.75 V 96 MHz Flash size = 1 MB / 2 MB, executing from SRAM or Flash (except RWW) VDD ≥ 1.65 V 85 MHz Flash size = 1 MB / 2 MB, Flash read while write (RWW), VDD ≥ 1.75 V (1) 85 MHz Flash size = 1 MB / 2 MB, Flash read while write (RWW), 1.65 < VDD < 1.75 V (1) 75 MHz fPCLK Peripheral Clock for APB 48 MHz fHCLK Peripheral Clock for AHB fCPUCLKmax MHz fOSC Clock Input 4 25 MHz fFMICLK FMI Flash Bus clock (internal clock) fCPUCLKmax MHz fBCLK External Memory Bus clock fCPUCLKmax MHz fRTC RTC Clock 32.768 kHz fEMAC EMAC PHY Clock 25 MHz fUSB USB Clock 48 MHz fTIMCLKEXT Timer External Clock 0 fPCLKmax/4 = 12 MHz fTIMCLK Timer Clock when Internal Clock (PCLK) is selected 0 fPCLKmax = 48 MHz 1. To avoid the speed restriction on RWW, the Flash write erase routines can be executed from SRAM, at up to 85 or 96 MHz, depending on VDD. |
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