EM681FV8A

Low Power, 1Mx8 SRAM

2

Name

Function

Name

Function

CS

Chip select inputs

Vcc

Power Supply

OE

Output Enable input

Vss

Ground

WE

Write Enable input

NC

No Connected

I/O Circuit

Column Select

Data

Cont

Pre-charge Circuit

Memory Array

2048 x 4096

WE

OE

CS

I/O0 ~ I/O7

Control Logic

FUNCTIONAL BLOCK DIAGRAM

PAD DIAGRAM

PAD DESCRIPTION

x

(0, 0)

EM681FV8A (Single C/S)

EMLSI LOGO

FEATURES

- Process Technology : 0.15

µm Full CMOS

-

Organization : 1M x 8 bit

-

Power Supply Voltage

=> EM681FV8A : 2.7V ~ 3.6V

-

Low Data Retention Voltage : 1.5V (Min.)

-

Three state output and TTL Compatible

-

Packaged product designed for 45/55/70ns

GENERAL PHYSICAL SPECIFICATIONS

-

Backside die surface of polished bare silicon

-

Typical Die Thickness = 725um +/-15um

-

Typical top-level metallization :

=> Metal (Ti/AlCu/TiN/ARC SiON/SiO2) : 5.2K Angstroms

-

Topside Passivation :

=> Passivation (HDP/pNIT/PIQ) : 5.4K Angstroms

-

Wafer diameter : 8 inch

BONDING INSTRUCTIONS

The 8M full CMOS LP SRAM die has total 56pads. Refer to the bond pad location and identification table for X, Y coordinates.

EMLSI recommends using a bond wire on back side of die onto Vss bond pad for improved noise immunity.