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STE100P Datasheet(PDF) 3 Page - STMicroelectronics

Part # STE100P
Description  10/100 FAST ETHERNET 3.3V TRANSCEIVER
PDF  29 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STE100P Datasheet(HTML) 3 Page - STMicroelectronics

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STE100P
3.0 PIN ASSIGNMENT DIAGRAM
Figure 3. Pin Connection4. Pin Description
4.0 PIN DESCRIPTION
Table 1. Pin Description
Pin No.
Name
Type
Description
MII Data Interface
59
58
57
56
55
TXD4
TXD3
TXD2
TXD1
TXD0
I
Transmit Data. The Media Access Controller (MAC) drives data to the STE100P
using these inputs.
TXD4 is monitored only in Symbol (5B) Mode.
These signals must be synchronized to the TX-CLK.
54
TX-EN
I
Transmit Enable. Thc MAC asserts this signal when it drives valid data on the
TXD inputs. This signal must be synchronized to the TX-CLK.
53
TX-CLK
I/O
Transmit Clock. Normally the STE100P drives TX-CLK. Refer to the Clock
Requirements discussion in the Functional Description section.
25 MHz for 100 Mbps operation.
2.5 MHz for 10 Mbps operation.
52
TX-ER
I
Transmit Coding Error. The MAC asserts this input when an error has occurred
in the transmit data stream. When the STE100P is operating at 100 Mbps, the
STE100P responds by sending invalid code symbols on the line. . In Symbol (5B)
Mode this pin is also equivalent to TXD4.
1
2
3
5
6
4
7
8
9
10
27
11
28 29 30 31 32
59 58 57 56
54
55
53 52 51 50 49
43
42
41
39
38
40
48
47
46
44
45
FDE
MF0
MF1
MF3
MF4
F2
X2
GNDA
VCCA
GNDE/I
GNDA
RDX3
MDC
MDIO
VCCE
IEDR10
GNDE
RX_DV
RXD0
RXD1
RDX2
VCCE/I
D99TL457
22 23 24 25 26
60
61
62
63
64
17 18 19 20 21
37
36
34
33
35
IEDTR
IEDL
IEDS
SCAN_EN
IEDC
12
13
14
15
16
VCCA
IREF
GNDA
X1
VCCA



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