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STLC1502 Datasheet(PDF) 64 Page - STMicroelectronics |
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STLC1502 Datasheet(HTML) 64 Page - STMicroelectronics |
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64 / 81 page ![]() STLC1502 64/81 9.0 D950 Domain The D950 domain consists of a D950 core, I RAM, I ROM, X RAM, Y RAM, Timer, Emulator, Interrupt controller and TAP, PCM interface peripherals. 9.0 D950 memory map The following table provides the memory map of D950 on X, Y, I buses. Mapping of D950 Y memory space (1 Word = 16 bit) Address Area name Area size 0x0000 --------- 0x000F DSP registers 16 Words 0x0010 ------- 0x001F EMU 16 Words 0x0020 ------- 0x002F ITC 16 Words 0x0030 ------- 0x005F Reserved DSP 0x0060 ------- 0x006F TIM 16 Words 0x0070 ------- 0xFFFF RAM Y 64 KWords |
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