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STLC5466 Datasheet(PDF) 115 Page - STMicroelectronics |
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STLC5466 Datasheet(HTML) 115 Page - STMicroelectronics |
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115 / 130 page ![]() 115/130 STLC5466 4.3 ST10/C16x demult. A/D; MOD0 = 0, MOD1 = 1, MOD2 = 1 Figure 4-5: ST10 (C16x) read cycle; demultiplexed A/D tx Parameter T min T max Unit t1 Delay NOT READY / NRD (if NCS0/1=0), (30 pF) Delay when immediate access 0 98 ns ns t2 Hold time Chip Select / NRD 10 ns t3 Delay NOT READY / NRD rising edge Delay when immediate access 0 98 ns ns t4 Width ALE 20 ns t7 Data valid before NOTREADY falling edge (30 pF) 0 ns t8 Data bus at high impedance after NRD (30 pF) 0 15 ns t9 Set up time NBHE, Address AD0/15, A16/ /ALE 5 ns t10 Hold time NBHE, Address AD0/15, A16/23 / NRD 10 ns t12 Delay NRD / NCS 0 ns NCS0/1 NDSACK0 / DTACK / NREADY NAS / ALE NDS / NRD D0/15 R/W / NWR A0/15 / AD0/15 A16/23 NBHE t3 t2 t1 t4 t7 t8 t9 t12 t10 |
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