STMPE1208S datasheet(10/51 Pages) STMICROELECTRONICS

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I2C interface

STMPE1208S

10/51

I2C interface

The features that are supported by the I2C interface are the following ones:

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I2C slave device

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Compliant to Philips I2C specification version 2.1

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Supports standard (up to 100 kbps) and fast (up to 400 kbps) modes.

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7-bit and 10-bit device addressing modes

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General call

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Start/Restart/Stop

The address is selected by the state of 2 pins. The state of the pins is read upon reset and

then the pins can be configured for normal operation. The pins have a pull-up or down to set

the address. The I2C interface module allows the connected host system to access the

registers in the STMPE1208S.

Start condition

A Start condition is identified by a falling edge of SDATA while SCLK is stable at high state.

A Start condition must precede any data/command transfer. The device continuously

monitors for a Start condition and will not respond to any transaction unless one is

encountered.

Stop condition

A Stop condition is identified by a rising edge of SDATA while SCLK is stable at high state.

A Stop condition terminates communication between the slave device and bus master. A

read command that is followed by NoAck can be followed by a Stop condition to force the

slave device into idle mode. When the slave device is in idle mode, it is ready to receive the

next I2C transaction. A Stop condition at the end of a write command stops the write

operation to registers.

Acknowledge bit (ACK)

The acknowledge bit is used to indicate a successful byte transfer. The bus transmitter

releases the SDATA after sending eight bits of data. During the ninth bit, the receiver pulls

the SDATA low to acknowledge the receipt of the eight bits of data. The receiver may leave

the SDATA in high state if it would to not acknowledge the receipt of the data.

Table 4.

I2C addresses

ID_1

ID_0

7-bit address

Write

Read

0x58

0xB0

0xB1

0x59

0xB2

0xB3

0x5A

0xB4

0xB5

0x5B

0xB6

0xB7

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