M54HC597D datasheet(2/14 Pages) STMICROELECTRONICS

2 / 14 page

M54HC597

2/14

Figure 1: IEC Logic Symbols

Figure 2: Input And Output Equivalent Circuit

Table 1: Pin Description

Table 2: Truth Table

X : Don’t Care

PIN N°

SYMBOL

NAME AND FUNCTION

QH’

Serial Data Outputs

SCLR

Asynchronous Reset

Input (Active LOW)

SCK

Shift Clock Input (LOW to

HIGH Edge-triggered)

RCK

Storage Clock Input (LOW

to HIGH Edge-triggered)

SLOAD

Parallel Data Input (Active

Low)

Serial Data Input

15, 1,2,3, 4,

5, 6, 7

A to H

Parallel Data Inputs

GND

Ground (0V)

VCC

Positive Supply Voltage

INPUTS

OUTPUT

SCK

SCLR

SLOAD

RCK

S.R. IS CLEARED TO "L"

INPUT REGISTER DATA IS STORED INTO S.R.

HHX

FIRST STAGE OF S.R. BECOMES "L" OTHER STAGES

STORE THE DATA OF PREVIOUS STAGE, RESPECTIVELY

HHX

FIRST STAGE OF S.R. BECOMES "H" OTHER STAGES

STORE THE DATA OF PREVIOUS STAGE, RESPECTIVELY

STATEOF S.R. ISNOT CHANGED

XXX

INPUT DATA ON A ~ H LINE IS STORED INTO INPUT REG-

ISTER

STORAGE REGISTER STATE IS NOT CHANGED

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