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Introduction

Lattice Semiconductor

LatticeSC/M Family Data Sheet

1-2

Table 1-1. LatticeSC Family Selection Guide

The LatticeSCM devices add MACO-enabled IP functionality to the base LatticeSC devices. Table 1-2 shows the

type and number of each pre-engineered IP core.

Table 1-2. LatticeSCM Family

Introduction

The LatticeSC family of FPGA combines a high-performance FPGA fabric, high-speed SERDES, high-perfor-

mance I/Os and large embedded RAM in a single industry leading architecture. This FPGA family is fabricated in a

state of the art technology to provide one of the highest performing FPGAs in the industry.

This family of devices includes features to meet the needs of today’s communication network systems. These fea-

tures include SERDES with embedded advance PCS (Physical Coding sub-layer), up to 7.8 Mbits of sysMEM

embedded block RAM, dedicated logic to support system level standards such as RAPIDIO, HyperTransport,

SPI4.2, SFI-4, UTOPIA, XGMII and CSIX. The devices in this family feature clock multiply, divide and phase shift

PLLs, numerous DLLs and dynamic glitch free clock MUXs which are required in today’s high end system designs.

High speed, high bandwidth I/O make this family ideal for high throughput systems.

Device

SC15

SC25

SC40

SC80

SC115

LUT4s (K)

115

sysMEM Blocks (18Kb)

104

216

308

424

Embedded Memory (Mbits)

1.03

1.92

3.98

5.68

7.8

Max. Distributed Memory (Mbits)

0.24

0.41

0.65

1.28

1.84

Number of 3.8Gbps SERDES (Max.)

DLLs

Analog PLLs

88888

MACO Blocks

Package I/O/SERDES Combinations (1mm ball pitch)

256-ball fpBGA (17 x 17mm)

139/4

900-ball fpBGA (31 x 31mm)

300/8

378/8

1020-ball fcBGA (33 x 33mm)

476/16

562/16

1152-ball fcBGA (35 x 35mm)

604/16

660/16

1704-ball fcBGA (42.5 x 42.5mm)

904/32

942/32

Note: The information in this preliminary data sheet is by deﬁnition not ﬁnal and subject to change. Please consult the Lat-

tice website and your local Lattice sales manager to ensure you have the latest information regarding the speciﬁcations for

these products as you make critical design decisions.

Device

SCM15

SCM25

SCM40

SCM80

SCM115

ﬂexiMAC Blocks

• 1GbE Mode

• 10GbE Mode

• PCI Express Mode

12224

SPI4.2 Blocks

12222

Memory Controller Blocks

• DDR/DDR2 DRAM Mode

• QDR II/II+ SRAM Mode

• RLDRAM I

• RLDRAM II CIO/SIO

12222

Low Speed CDR Blocks

00222

PCI Express LTSSM (PHY) Blocks

10222

Note: See each IP core user’s guide for more information about support for speciﬁc LatticeSCM devices.

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