STLS2F01 datasheet(20/48 Pages) STMICROELECTRONICS

Part #	STLS2F01

Description	Loongson 2F: High performance 64-bit superscalar MIPS® microprocessor

PDF	48 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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20 / 48 page

I/O bus interface description

STLS2F01

20/48

Figure 6.

Local bus write timing

3.6

Interrupt handling

An interrupt controller is built in STLS2F01 processor to handle internal and external

interrupt. The most significant 4 bits of the interrupt INTn[5:0] in STLS2E01 are still being

used as interrupt in STLS2F01, while the other two bits are used for new interrupt in

STLS2F01, such as PCI_IRQ and GPIO, etc.

How to handle the interrupt between processors: the interrupt initiator writes the dedicated

interrupt register in the chipset. Upon receiving the request for interrupt transmission, the

chipset will request the target processor for interrupt. The processor handles the request in

the same way as the previous STLS2E01 and beyond.

lioden

liodir

lioadlock

liocs

pciclk

lioaddr

lioad

liowr

addr[7:0]

addr[7:0]+1

addr[23:8]data_0

data_1

STLS2F01 Datasheet(PDF) 20 Page - STMicroelectronics