STLS2F02 datasheet(20/49 Pages) STMICROELECTRONICS

Part #	STLS2F02

Description	Loongson 2F high performance 64-bit superscalar MIPS® microprocessor

PDF	49 Pages

Scroll/Zoom	100%

Manufacturer	STMICROELECTRONICS [STMicroelectronics]

Direct Link	http://www.st.com

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20 / 49 page

IO bus interface description

STLS2F02

20/49

Figure 6.

Local bus write timing

3.6

Interrupt handling

An interrupt controller is built into the STLS2F02 processor to handle internal and external

interrupt. The 4 most significant bits of the interrupt INTn[5:0] in L2E are still used as

interrupts in the STLS2F02, while the other two bits are used for new interrupts, such as

PCI_IRQ and GPIO.

Interrupt between processors is handled as follows:

The interrupt initiator writes the dedicated interrupt register in the chipset.

Upon receiving the request for interrupt transmission, the chipset requests the target

processor for an interrupt.

The processor handles the request in the same way as the previous L2E.

lioden

liodir

lioadlock

liocs

pciclk

lioaddr

lioad

liowr

addr[7:0]

addr[7:0]+1

addr[23:8]data_0

data_1

STLS2F02 Datasheet(PDF) 20 Page - STMicroelectronics