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STW5095 Datasheet(PDF) 45 Page - STMicroelectronics |
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STW5095 Datasheet(HTML) 45 Page - STMicroelectronics |
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45 / 73 page  Control interface and master clock STw5095 44/72 6.2 Control interface SPI mode Figure 7. Control interface SPI format(a) Table 2. Control interface timing with I²C format Symbol Parameter Test Condition Min. Typ. Max. Unit fSCL Clock frequency 400 kHz tHIGH Clock pulse width high 600 ns tLOW Clock pulse width low 1300 ns tR SDA and SCLK rise time 1000 ns tF SDA and SCLK fall time 300 ns tHD:STA Start condition hold time 600 ns tSU:STA Start condition setup time 600 ns tHD:DAT Data input hold time 0 ns tSU:DAT Data input setup time 250 ns tSU:STO Stop condition setup time 600 ns tBUF Bus free time 1300 ns a. CMOD pin tied to VCCIO; SDO pin position selected with bits SPIOSEL in CR33. A6 A5 8 bit Address A4 A3 A2 A1 A0 W/R D7 D6 D5 D4 D3 D2 D1 D0 8 bit Data SDIN D7 D6 D5 D4 D3 D2 D1 D0 8 bit Data SDO SCLK CSB SPIOHIZ=1 |
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