HD151TS207SS datasheet(25/38 Pages) RENESAS

Part #	HD151TS207SS

Description	Mother Board Clock Generator for Intel P4 Chipset (Springdale)

PDF	38 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

25 / 38 page

HD151TS207SS

Rev.1.00, Apr.25.2003, page 25 of 38

Renesas clock generator I

2C Serial Interface Operation

1. Write mode

1.1

Controller (host) sends a start bit.

1.2

Controller (host) sends the write address D2 (h).

1.3

Renesas clock generator will acknowledge (Renesas clock gen. sends “Low”).

1.4

Controller (host) sends a begin byte M.

1.5

Renesas clock generator will acknowledge (Renesas clock gen. sends “Low”).

1.6

Controller (host) sends a byte count N.

1.7

Renesas clock generator will acknowledge (Renesas clock gen. sends “Low”).

1.8

Controller (host) sends data from byte M to byte M+N–1.

1.9

Renesas clock generator will acknowledge each byte one at a time.

1.10 Controller (host) sends a stop bit.

Start bit

1 bit

1 bit 1 bit

1 bit

7 bits

8 bits

Byte M

Slave

address

Begin Byte = M

Byte Count = N

R/W

D2(h)

Ack

1 bit

Ack

1 bit

Ack

Byte M+1

8 bits

1 bit

Stop bit

8 bits

Byte M+N–1

Ack

HD151TS207SS Datasheet(PDF) 25 Page - Renesas Technology Corp

HD151TS207SS Datasheet(HTML) 25 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

Datasheet Download

Link URL