| Electronic Components Datasheet Search |
|
HD404612FS Datasheet(PDF) 21 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD404612FS Datasheet(HTML) 21 Page - Renesas Technology Corp |
|
21 / 91 page ![]() HD404618 Series 19 Table 3 Interrupt Processing and Activation Conditions Interrupt Source Interrupt Control Bit INT 0 INT 1 Timer A Timer B Timer C Serial IE 1111 11 IF0· IM0 1000 00 IF1· IM1 * 100 00 IFTA· IMTA ** 10 00 IFTB· IMTB *** 10 0 IFTC· IMTC **** 10 IFS· IMS **** * 1 Note: Bits marked by * can be either 0 or 1. Their values have no effect on operation. Instruction cycles 12 3 4 5 6 Instruction execution* IE reset Interrupt acceptance Execution of JMPL instruction at vector address Execution of instruction at start address of interrupt routine Vector address generation Note: * The stack is accessed and the IE reset after the instruction is executed, even if it is a two-cycle instruction. Stacking Figure 8 Interrupt Processing Sequence |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |