H8SXSLASH1663 datasheet(898/1158 Pages) RENESAS

Part #	H8SX/1663

Description	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

PDF	1158 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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898 / 1158 page

Section 17 I

2C Bus Interface 2 (IIC2)

Rev.1.00 Jun. 07, 2006 Page 846 of 1102

REJ09B0294-0100

Yes

RDRF = 1?

Yes

RDRF = 1?

Yes

[1]

[2]

[3]

[4]

[5]

[6]

[7]

[8]

[9]

[10]

[1] Clear the AAS flag.*

[2] Set the acknowledge for the transmit device.*

[3] Dummy read ICDRR*

[4] Wait for 1 byte of data to be received*

[5] Detect (last reception -1)*

[6] Read the receive data.*

[7] Set the acknowledge for the last byte.*

[8] Read the receive data of (last byte -1).*

[9] Wait for the reception of the last byte to be completed.

[10] Read the last byte of receive data.

Slave receive mode

Clear AAS in ICSR

Set ACKBT = 0 in ICIER

Dummy read ICDRR

Read RDRF in ICSR

The last

reception -1?

Read ICDRR

Set ACKBT = 1 in ICIER

Read ICDRR

Read RDRF in ICSR

Read ICDRR

End

Note: * For one-byte reception, steps [2] to [6] do not need to be executed. After step [1], execute step [7].

In step [8], read ICDRR (dummy read).

Figure 17.17 Sample Flowchart for Slave Receive Mode

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