H8SXSLASH1663 datasheet(909/1158 Pages) RENESAS

909 / 1158 page

Section 18 A/D Converter

Rev.1.00 Jun. 07, 2006 Page 857 of 1102

REJ09B0294-0100

ADIE

ADST

ADF

ADDRA

ADDRB

ADDRC

ADDRD

Channel 0 (AN0)

operation state

Channel 1 (AN1)

operation state

Channel 2 (AN2)

operation state

Channel 3 (AN3)

operation state

Set*

A/D conversion start

Clear*

Waiting for conversion

Reading A/D conversion result

A/D conversion 1

A/D conversion 2

A/D conversion result 1

A/D conversion result 2

Waiting for

conversion

Note: *

↓ indicates the timing of instruction execution by software.

Figure 18.2 Example of A/D Converter Operation (Single Mode, Channel 1 Selected)

18.4.2

Scan Mode

In scan mode, A/D conversion is to be performed sequentially on the analog inputs of the specified

channels up to four or eight channels.

1. When the ADST bit in ADCSR is set to 1 by software, TPU, TMR, or an external trigger

input, A/D conversion starts on the first channel in the group. Consecutive A/D conversion on

a maximum of four channels (SCANE and SCANS = B'10) or on a maximum of eight

channels (SCANE and SCANS = B'11) can be selected. When consecutive A/D conversion is

performed on four channels, A/D conversion starts on AN4 when CH3 and CH2 = B'01. When

consecutive A/D conversion is performed on eight channels, A/D conversion starts on AN0

when CH3 = B'0.

2. When A/D conversion for each channel is completed, the A/D conversion result is sequentially

transferred to the corresponding ADDR of each channel.

H8SX/1663 Datasheet(PDF) 909 Page - Renesas Technology Corp

H8SX/1663 Datasheet(HTML) 909 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL