H8SXSLASH1663 datasheet(912/1158 Pages) RENESAS

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Section 18 A/D Converter

Rev.1.00 Jun. 07, 2006 Page 860 of 1102

REJ09B0294-0100

Table 18.3

A/D Conversion Characteristics (Single Mode)

CKS1 = 0

CKS1 = 1

CKS0 = 0

CKS0 = 1

CKS0 = 0

CKS0 = 1

Item

Symbol

Min. Typ. Max.

A/D conversion

start delay time



Input sampling time t

SPL



127



A/D conversion

time

CONV

515



530

259



266

131



134



Note:

Values in the table are the number of states.

Table 18.4

A/D Conversion Characteristics (Scan Mode)

CKS1

CKS0

Conversion Time (Number of States)

512 (Fixed)

256 (Fixed)

128 (Fixed)

64 (Fixed)

18.4.4

External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to B'11 in

ADCR, an external trigger is input from the

ADTRG0 pin. A/D conversion starts when the ADST

bit in ADCSR is set to 1 on the falling edge of the

ADTRG0 pin. Other operations, in both single

and scan modes, are the same as when the ADST bit has been set to 1 by software. Figure 18.5

shows the timing.

ADTRG0

Internal trigger

signal

ADST

A/D conversion

Figure 18.5 External Trigger Input Timing

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