H8SXSLASH1663 datasheet(916/1158 Pages) RENESAS

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Section 18 A/D Converter

Rev.1.00 Jun. 07, 2006 Page 864 of 1102

REJ09B0294-0100

18.7.4

Setting Range of Analog Power Supply and Other Pins

If the conditions shown below are not met, the reliability of the LSI may be adversely affected.

• Analog input voltage range

The voltage applied to analog input pin ANn during A/D conversion should be in the range

AVss

≤ VAN ≤ Vref.

• Relation between AVcc, AVss and Vcc, Vss

As the relationship between AVcc, AVss and Vcc, Vss, set AVcc = Vcc

± 0.3 V and AVss =

Vss. If the A/D converter is not used, set AVcc = Vcc and AVss = Vss.

• Vref setting range

The reference voltage at the Vref pin should be set in the range Vref

≤ AVcc.

18.7.5

Notes on Board Design

In board design, digital circuitry and analog circuitry should be as mutually isolated as possible,

and layout in which digital circuit signal lines and analog circuit signal lines cross or are in close

proximity should be avoided as far as possible. Failure to do so may result in incorrect operation

of the analog circuitry due to inductance, adversely affecting A/D conversion values.

Digital circuitry must be isolated from the analog input pins (AN0 to AN7), analog reference

power supply (Vref), and analog power supply (AVcc) by the analog ground (AVss). Also, the

analog ground (AVss) should be connected at one point to a stable ground (Vss) on the board.

18.7.6

Notes on Noise Countermeasures

A protection circuit connected to prevent damage due to an abnormal voltage such as an excessive

surge at the analog input pins (AN0 to AN7) should be connected between AVcc and AVss as

shown in figure 18.9. Also, the bypass capacitors connected to AVcc and the filter capacitor

connected to the AN0 to AN7 pins must be connected to AVss.

If a filter capacitor is connected, the input currents at the AN0 to AN7 pins are averaged, and so an

error may arise. Also, when A/D conversion is performed frequently, as in scan mode, if the

current charged and discharged by the capacitance of the sample-and-hold circuit in the A/D

converter exceeds the current input via the input impedance (R

in), an error will arise in the analog

input pin voltage. Careful consideration is therefore required when deciding the circuit constants.

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