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H8SX/1663 Datasheet(PDF) 936 Page - Renesas Technology Corp |
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H8SX/1663 Datasheet(HTML) 936 Page - Renesas Technology Corp |
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936 / 1158 page  Section 21 Flash Memory (0.18- µm F-ZTAT Version) Rev.1.00 Jun. 07, 2006 Page 884 of 1102 REJ09B0294-0100 21.6 Register Descriptions The flash memory has the following registers. Programming/Erasing Interface Registers: • Flash code control/status register (FCCS) • Flash program code select register (FPCS) • Flash erase code select register (FECS) • Flash key code register (FKEY) • Flash transfer destination address register (FTDAR) Programming/Erasing Interface Parameters: • Download pass and fail result parameter (DPFR) • Flash pass and fail result parameter (FPFR) • Flash program/erase frequency parameter (FPEFEQ) • Flash multipurpose address area parameter (FMPAR) • Flash multipurpose data destination area parameter (FMPDR) • Flash erase block select parameter (FEBS) • RAM emulation register (RAMER) There are several operating modes for accessing the flash memory. Respective operating modes, registers, and parameters are assigned to the user MAT. The correspondence between operating modes and registers/parameters for use is shown in table 21.3. |
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