H8SXSLASH1663R datasheet(948/1504 Pages) RENESAS

948 / 1504 page

Section 19 Serial Communication Interface (SCI, IrDA, CRC)

Rev. 2.00 Sep. 24, 2008 Page 916 of 1468

REJ09B0412-0200

19.4.4

SCI Initialization (Asynchronous Mode)

Before transmitting and receiving data, first clear the TE and RE bits in SCR to 0, then initialize

the SCI as described in a sample flowchart in figure 19.8 When the operating mode, transfer

format, etc., is changed, the TE and RE bits must be cleared to 0 before making the change. When

the TE bit is cleared to 0, the TDRE flag is set to 1. Note that clearing the RE bit to 0 does not

initialize the RDRF, PER, FER, and ORER flags, or RDR. When the external clock is used in

asynchronous mode, the clock must be supplied even during initialization.

Wait

Start initialization

Set data transfer format in

SMR and SCMR

[2]

Set CKE1 and CKE0 bits in SCR

(TE and RE bits are 0)

Yes

Set value in BRR

Set corresponding bit in ICR to 1

[3]

[4]

Set TE or RE bit in

SCR to 1, and set RIE, TIE, TEIE,

and MPIE bits

[5]

1-bit interval elapsed

[1]

Set the bit in ICR for the corresponding

pin when receiving data or using an

external clock.

[2]

Set the clock selection in SCR.

Be sure to clear bits RIE, TIE, TEIE, and

MPIE, and bits TE and RE, to 0.

When the clock output is selected in

asynchronous mode, the clock is output

immediately after SCR settings are

made.

[3]

Set the data transfer format in SMR and

SCMR.

[4]

Write a value corresponding to the bit

rate to BRR. This step is not necessary

if an external clock is used.

[5]

Wait at least one bit interval, then set the

TE bit or RE bit in SCR to 1. Also set

the RIE, TIE, TEIE, and MPIE bits.

Setting the TE and RE bits enables the

TxD and RxD pins to be used.

[1]

Clear TE and RE bits in SCR to 0

Figure 19.8 Sample SCI Initialization Flowchart

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