H8SXSLASH1663R datasheet(988/1504 Pages) RENESAS

988 / 1504 page

Section 19 Serial Communication Interface (SCI, IrDA, CRC)

Rev. 2.00 Sep. 24, 2008 Page 956 of 1468

REJ09B0412-0200

Start transmission

Transmission

[1]

Yes

Read TEND flag in SSR

Make transition to

software standby mode

Cancel software standby mode

TE = 0

Initialization

TE = 1

[2]

[3]

All data transmitted?

Change operating mode?

TEND = 1

[1] Data being transmitted is lost

halfway. Data can be normally

transmitted from the CPU by

setting the TE bit to 1, reading

SSR, writing to TDR, and

clearing the TDRE bit to 0 after

clearing software standby mode;

however, if the DTC has been

activated, the data remaining in

the DTC will be transmitted when

both the TE and TIE bits are set

to 1.

[2] Clear the TIE and TEIE bits to 0

when they are 1.

[3] Setting of the module stop state

is included.

Figure 19.39 Sample Flowchart for Software Standby Mode Transition during

Transmission

TE bit

SCK*

output pin

TxD

output pin

Note: * Not output in SCI_5, 6.

Port

input/output

Port input/output

Port

input/output

Start

Stop

High output

Transmission start

Transmission end

Transition to

software standby

mode

Software standby

mode canceled

SCI TxD output

Port

SCI

TxD output

Figure 19.40 Port Pin States during Software Standby Mode Transition

(Internal Clock, Asynchronous Transmission)

H8SX/1663R Datasheet(PDF) 988 Page - Renesas Technology Corp

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