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H8SX/1663R Datasheet(PDF) 1469 Page - Renesas Technology Corp

Part # H8SX/1663R
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R Datasheet(HTML) 1469 Page - Renesas Technology Corp

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Main Revisions and Additions in this Edition
Rev. 2.00 Sep. 24, 2008 Page 1437 of 1468
REJ09B0412-0200
Item
Page
Revision (See Manual for Details)
Section 9 Bus Controller
(BSC)
9.11.13 Refresh Control
Figure 9.77 Auto-Refresh
Timing (TPC1 = 0, TPC0 = 1)
329
Amended
20
Figure 9.78 Auto-Refresh
Timing (TPC1 = 0, TPC0 = 0,
RLW2 = 0, RLW1 = 0, RLW0
= 1)
330
Amended
Positions of dotted lines have been corrected.
Section 10 DMA Controller
(DMAC)
10.1 Features
376
Added
•
Module stop state can be set.
10.3.5 DMA Block Size
Register (DBSR)
384
Amended
Bit table
Initial Value of the Bit 31-16 and 15-0
[Before amendment] Undefined
→
[After amendment] All 0
10.5.8 Priority of Channels
Figure 10.22 Example of
Timing for Channel Priority
428
Amended
Positions of dotted lines have been corrected.
Section11 EXDMA Controller
(EXDMAC)
11.1 Features
454
Added
Module stop state can be set.
Section 12. Data Transfer
Controller (DTC)
12.1 Features
Figure 12.1 Block Diagram of
DTC
560
Amended
DTCCR
Interrupt controller
DTCERA
to DTCERF



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