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H8SX/1663M Datasheet(PDF) 1049 Page - Renesas Technology Corp

Part # H8SX/1663M
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663M Datasheet(HTML) 1049 Page - Renesas Technology Corp

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Section 20 USB Function Module (USB)
Rev. 2.00 Sep. 24, 2008 Page 1017 of 1468
REJ09B0412-0200
(5)
Status Stage (Control-Out)
USB function
Application
IN token reception
0-byte transmission to host
End of control transfer
Set EP0i transmission
complete flag
(IFR0.EP0i TS = 1)
Clear EP0i transfer
request flag
(IFR0.EP0i TR = 0)
Write 1 to EP0i packet
enable bit
(TRG.EP0i PKTE = 1)
Clear EP0i transmission
complete flag
(IFR0.EP0i TS = 0)
End of control transfer
Valid data
in EP0i FIFO?
ACK
Yes
No
NACK
Interrupt request
Interrupt request
Figure 20.16 Status Stage (Control-Out) Operation
The control-out status stage starts with an IN token from the host. When an IN-token is received at
the start of the status stage, there is not yet any data in the EP0i FIFO, and so an EP0i transfer
request interrupt is generated. The application recognizes from this interrupt that the status stage
has started. Next, in order to transmit 0-byte data to the host, 1 is written to the EP0i packet enable
bit but no data is written to the EP0i FIFO. As a result, the next IN token causes 0-byte data to be
transmitted to the host, and control transfer ends.
After the application has finished all processing relating to the data stage, 1 should be written to
the EP0i packet enable bit.



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