H8SXSLASH1663M datasheet(1285/1504 Pages) RENESAS

1285 / 1504 page

Section 28 Power-Down Modes

Rev. 2.00 Sep. 24, 2008 Page 1253 of 1468

REJ09B0412-0200

28.2.7

Deep Standby Interrupt Flag Register (DPSIFR)

DPSIFR is used to request an exit from deep software standby mode. When the interrupt specified

in DPSIEGR is generated, the applicable bit in DPSIFR is set to 1. The bit is set to 1 even when an

interrupt is generated in the modes other than deep software standby. Therefore, a transition to

deep software standby should be made after this register bits are cleared to 0.

DPSIFR is not initialized by the internal reset signal upon exit from deep software standby mode.

Bit

Bit name

Initial value:

R/W:

DNMIF

R/(W)*1

DUSBIF

R/(W)*1

DT32KIF

R/(W)*1

DLVDIF*2

R/(W)*1

DIRQ3F

R/(W)*1

DIRQ2F

R/(W)*1

DIRQ1F

R/(W)*1

DIRQ0F

R/(W)*1

Note: 1. Only 0 can be written to clear the flag.

2. Supported only by the H8SX/1668M Group.

Bit

Bit Name

Initial

Value

R/W

Module

DNMIF

R/(W)*

NMI Flag

[Setting condition]

NMI input specified in DPSIEGR is generated.

[Clearing condition]

Writing a 0 to this bit after reading it as 1.

DUSBIF

R/(W)*

USB Suspend/Resume Interrupt Flag

[Setting condition]

When the USB suspend/resume interrupt occurs.

[Clearing condition]

Writing a 0 to this bit after reading it as 1.

DT32KIF

R/(W)*

32K Timer Interrupt Flag

[Setting condition]

When the 32K timer interrupt occurs.

[Clearing condition]

Writing a 0 to this bit after reading it as 1.

H8SX/1663M Datasheet(PDF) 1285 Page - Renesas Technology Corp

H8SX/1663M Datasheet(HTML) 1285 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL