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H8SX/1663M Datasheet(PDF) 1289 Page - Renesas Technology Corp |
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H8SX/1663M Datasheet(HTML) 1289 Page - Renesas Technology Corp |
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1289 / 1504 page  Section 28 Power-Down Modes Rev. 2.00 Sep. 24, 2008 Page 1257 of 1468 REJ09B0412-0200 Bit Bit Name Initial Value R/W Module 6 to 3 0 R/W Reserved These bits are always read as 0. The write value should always be 0. • H8SX/1668R Group 2 to 0 0 R/W Reserved These bits are always read as 0. The write value should always be 0. • H8SX/1668M Group 2 LVDF Undefined R/(W)* LVD Flag This bit indicates that the voltage-detection circuit has detected a low voltage (Vcc at or below Vdet). For details, see section 5, Voltage Detection Circuit (LVD). 1 Undefined R/W Reserved The write value should always be 0. 0 PORF Undefined R Power-on reset flag Indicates the Power-on reset is generated. For details, see section 4, Resets. Note: * Only 0 can be written to clear the flag. |
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