H8SXSLASH1663M datasheet(1313/1504 Pages) RENESAS

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Section 28 Power-Down Modes

Rev. 2.00 Sep. 24, 2008 Page 1281 of 1468

REJ09B0412-0200

28.10

Sleep Instruction Exception Handling

A sleep instruction exception handling is generated by executing a SLEEP instruction. The sleep

instruction exception handling is always accepted in the program execution state.

When the SLPIE bit is set to 0, sleep instruction exception handling does not follow execution of

the SLEEP instruction. In this case, the CPU is placed in the power-down state. After exit from the

power-down state has been initiated by an exception, the CPU starts handling of the exception.

When the SLPIE bit is set to 1, sleep instruction exception handling follows execution of the

SLEEP instruction. The CPU immediately starts sleep instruction exception handling, which

blocks the transition to the power-down state is prevented by.

When a SLEEP instruction is executed while the SLPIE bit is cleared to 0, a transition is made to

the power-down state. Exit from the power-down state is initiated by an exit-initiating interrupt

source (see figure 28.10).

When an interrupt that causes exit from the power-down state is generated immediately before the

execution of a SLEEP instruction, exception handling for the interrupt starts. On return from the

exception service routine, the SLEEP instruction is executed to enter the power-down state. In this

case, exit from the power-down state will not take place until the next time an exit-initiating

interrupt is generated (see figure 28.11).

As stated above, setting the SLPIE bit to 1 causes sleep instruction exception handling to follow

the execution of the SLEEP instruction. If this setting is made in the exception service routine for

an interrupt that initiates exit from the power-down state, handling of the sleep instruction

exception due to the execution of a SLEEP instruction will proceed even if the interrupt was

generated immediately beforehand (see figure 28.12). Consequently, the CPU will execute the

instruction that follows the SLEEP instruction, after handling of the sleep instruction exception

and exception service routine, and will not enter the power-down state.

Thus, when the SLPIE bit is set to 1 to enable the sleep exception handling, clear the SSBY bit in

SBYCR to 0.

H8SX/1663M Datasheet(PDF) 1313 Page - Renesas Technology Corp