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M32C/86 Datasheet(PDF) 423 Page - Renesas Technology Corp |
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M32C/86 Datasheet(HTML) 423 Page - Renesas Technology Corp |
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423 / 505 page ![]() Page 400 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 25. Flash Memory Version ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M 25.3.3.4 FMSTP Bit The FMSTP bit initializes the flash memory control circuits and minimizes power consumption in the flash memory. Access to the flash memory is disabled when the FMSTP bit is set to "1". Set the FMSTP bit by program in a space other than the flash memory. Set the FMSTP bit to "1" if one of the followings occurs: • A flash memory access error occurs while erasing or programming in EW mode 0 (FMR00 bit does not switch back to "1" (ready)). • Low-power consumption mode or on-chip low-power consumption mode is entered. Use the following the procedure to change the FMSTP bit setting. (1) Set the FMSTP bit to "1" (2) Set tps (the wait time to stabilize flash memory circuit) (3) Set the FMSTP bit to "0" (4) Set tps (the wait time to stabilize flash memory circuit) Figure 25.8 shows a flow chart illustrating how to start and stop the flash memory before and after entering low power mode. Follow the procedure on this flow chart. When entering stop or wait mode, the flash memory is automatically turned off. When exiting stop or wait mode, the flash memory is turned back on. The FMR0 register does not need to be set. 25.3.3.5 FMR05 Bit The FMR05 bit selects the boot ROM or user ROM area in boot mode. Set to "0" to access (read) the boot ROM area or to "1" (user ROM access) to access (read, write or erase) the user ROM area. 25.3.3.6 FMR06 Bit The FMR06 bit is a read-only bit indicating an auto program operation state. The FMR06 bit is set to "1" when a program error occurs; otherwise, it is set to "0". Refer to 25.3.8 Full Status Check. 25.3.3.7 FMR07 Bit The FM07 bit is a read-only bit indicating the auto erase operation state. The FMR07 bit is set to "1" when an erase error occurs; otherwise, it is set to “0”. For details, refer to 25.3.8 Full Status Check. Figure 25.6 shows how to enter and exit EW mode 0. Figure 25.7 shows how to enter and exit EW mode 1. 25.3.3.8 FMR11 Bit EW mode 0 is entered by setting the FMR11 bit to "0" (EW mode 0). EW mode 1 is entered by setting the FMR11 bit to "1" (EW mode 1). 25.3.3.9 FMR16 Bit The FMR16 bit is a read-only bit indicating the execution result of the read lock bit status command. When the block, where the read lock bit status command is executed, is locked, the FMR16 bit is set to "0". When the block, where the read lock bit status command is executed, is unlocked, the FMR16 bit is set to "1". |
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