M32CSLASH86 datasheet(427/505 Pages) RENESAS

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Page 404

25. Flash Memory Version

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25.3.4 Precautions in CPU Rewrite Mode

25.3.4.1 Operating Speed

Set the MCD4 to MCD0 bits in the MCD register to CPU clock frequency of 10 MHz or less before

entering CPU rewrite mode (EW mode 0 or EW mode 1). Also, set the PM12 bit in the PM1 register to

"1" (wait state).

25.3.4.2 Prohibited Instructions

The following instructions cannot be used in EW mode 0 because the CPU tries to read data in the flash

memory: the UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK instruction.

25.3.4.3 Interrupts (EW Mode 0)

• To use interrupts having vectors in a relocatable vector table, the vectors must be relocated to the

RAM area.

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• The NMI and watchdog timer interrupts are available since the FMR0 and FMR1 registers are forc-

ibly reset when either interrupt occurs. Allocate the forward addresses for each interrupt routine to

_______

the fixed vector table. Flash memory rewrite operation is aborted when the NMI or watchdog timer

interrupt occurs. Execute the rewrite program again after exiting the interrupt routine.

• The address match interrupt is not available since the CPU tries to read data in the flash memory.

25.3.4.4 Interrupts (EW Mode 1)

• Do not acknowledge any interrupts with vectors in the relocatable vector table or address match

interrupt during the auto program or auto erase period.

• Do not use the watchdog timer interrupt.

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• The NMI interrupt is available since the FMR0 and FMR1 registers are forcibly reset when either

interrupt occurs. Allocate the forward address for the interrupt routine to the fixed vector table. Flash

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memory rewrite operation is aborted when the NMI interrupt occurs. Execute the rewrite program

again after exiting the interrupt routine.

25.3.4.5 How to Access

To set the FMR01, FMR02 in the FMR0 register or FMR11 bit in the FMR1 register to "1", set to "1"

in 8-bit units immediately after setting to "0". Do not generate an interrupt or a DMA transfer between

the instruction to set the bit to "0" and the instruction to set the bit to "1". Set the bit while a high-level

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("H") signal is applied to the NMI pin.

To change the FMR01 bit from "1" to "0", enter read array mode first, and write into address 005716 in

16-bit units. Eight high-order bits must be set to "0016".

25.3.4.6 Rewriting in the User ROM Area (EW Mode 0)

If the supply voltage drops while rewriting the block where the rewrite control program is stored, the

flash memory cannot be rewritten because the rewrite control program is not rewritten as expected. If

this error occurs, rewrite the user ROM area while in standard serial I/O mode or parallel I/O mode.

25.3.4.7 Rewriting in the User ROM Area (EW Mode 1)

Do not rewrite the block where the rewrite control program is stored.

25.3.4.8 DMA Transfer

In EW mode 1, do not generate a DMA transfer while the FMR00 bit in the FMR0 register is set to "0"

(busy-programming or erasing).

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