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AT89C51ED2-RDTUM Datasheet(PDF) 79 Page - ATMEL Corporation |
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AT89C51ED2-RDTUM Datasheet(HTML) 79 Page - ATMEL Corporation |
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79 / 137 page  79 4235K–8051–05/08 AT89C51RD2/ED2 Table 17-8. IPH1 Register IPH1 - Interrupt Priority High Register (B3h) Reset Value = XXXX X000b Not bit addressable 7 6 5 4 3 2 1 0 - - - - - SPIH - KBDH Bit Number Bit Mnemonic Description 7 - Reserved The value read from this bit is indeterminate. Do not set this bit. 6 - Reserved The value read from this bit is indeterminate. Do not set this bit. 5 - Reserved The value read from this bit is indeterminate. Do not set this bit. 4 - Reserved The value read from this bit is indeterminate. Do not set this bit. 3 - Reserved The value read from this bit is indeterminate. Do not set this bit. 2 SPIH SPI interrupt Priority High bit SPIHSPILPriority Level 0 0Lowest 0 1 1 0 1 1Highest 1 - Reserved The value read from this bit is indeterminate. Do not set this bit. 0 KBDH Keyboard interrupt Priority High bit KB DHKBDLPriority Level 0 0 Lowest 0 1 1 0 1 1Highest |
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