LV96/LV98 Series 3.3 V

LVDS Clock Oscillators

January 2008

www.pletronics.com

425-776-1880

5

Parameter

Condition

Mechanical Shock

MIL-STD-883 Method 2002, Condition B

Vibration

MIL-STD-883 Method 2007, Condition A

Solderability

MIL-STD-883 Method 2003

Thermal Shock

MIL-STD-883 Method 1011, Condition A

ESD Rating

Model

Minimum Voltage

Conditions

Human Body Model

1500

MIL-STD-883 Method 3115

Charged Device Model

1000

JESD 22-C101

Package Labeling

Label is 1" x 2.6" (25.4mm x 66.7mm)

Label is 1" x 2.6" (25.4mm x 66.7mm)

Font is Courier New

Font is Arial

Bar code is 39-Full ASCII

(The part number will show as LV96xx or LV98xx)

Layout and application information

For Optimum Jitter Performance, Pletronics recommends:

•

a ground plane under the device

•

no large transient signals (both current and voltage) should be routed under the device

•

do not layout near a large magnetic field such as a high frequency switching power supply

•

do not place near piezoelectric buzzers or mechanical fans.

As much ground plane and thermal paths that can be realized under and to the side of the part is desired

.