CD74ACT175E datasheet(6/7 Pages) TI

6 / 7 page

Propagation Delay, MR to Q, QtPLH, tPHL

1.5

139

153

3.3

4.4

15.5

4.3

17.1

3.2

11.1

3.1

12.2

Input Capacitance

-10-

-10

Power Dissipation Capacitance

CPD

(Note 13)

ACT TYPES

Propagation Delay, CP to Qn

tPLH, tPHL

(Note 12)

10.5

2.9

11.5

Propagation Delay, MR to Qn

tPLH, tPHL

3.3

11.8

3.3

Input Capacitance

-10-

-10

Power Dissipation Capacitance

CPD

(Note 13)

NOTES:

22. Limits tested 100%.

23. 3.3V Min is at 3.6V, Max is at 3V.

24. 5V Min is at 5.5V, Max is at 4.5V.

25. CPD is used to determine the dynamic power consumption per flip-flop.

PD =CPD VCC

2 f

i + Σ (CL +VCC2fo)+VCC ∆ICC where fi = input frequency, fo = output frequency, CL = output load capacitance, VCC =

supply voltage.

FIGURE 5. PROPAGATION DELAYS

FIGURE 6. RESET OR SET PREREQUISITE AND

PROPAGATION DELAYS

FIGURE 7.

FIGURE 8. PROPAGATION DELAY TIMES

Switching Speciﬁcations Input tr, tf = 3ns, CL = 50pF (Worst Case) (Continued)

PARAMETER

SYMBOL

VCC (V)

-40oC TO 85oC

-55oC TO 125oC

UNITS

MIN

TYP

MAX

MIN

TYP

MAX

INPUT LEVEL

GND

tPHL

tPLH

INPUT LEVEL

GND

INPUT

tREM

tPHL

INPUT LEVEL

GND

tSU(L)

tH(L)

tH(H)

tSU(H)

INPUT LEVEL

GND

DUT

OUTPUT

RL (NOTE)

OUTPUT

LOAD

500

Ω

50pF

NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.

CD74AC

CD74ACT

Input Level

VCC

Input Switching Voltage, VS

0.5 VCC

1.5V

Output Switching Voltage, VS

0.5 VCC

CD74AC175, CD74ACT175

CD74ACT175E Datasheet(PDF) 6 Page - Texas Instruments

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