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PCS3P622S04J Datasheet(PDF) 4 Page - PulseCore Semiconductor

Part # PCS3P622S04J
Description  Low Frequency Timing-Safe??Peak EMI reduction IC
PDF  10 Pages
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Manufacturer  PULSECORE [PulseCore Semiconductor]
Direct Link  http://www.onsemi.com/
Logo PULSECORE - PulseCore Semiconductor

PCS3P622S04J Datasheet(HTML) 4 Page - PulseCore Semiconductor

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May 2007
PCS3P622S04J
rev 0.3
Low Frequency Timing-Safe™ Peak EMI Reduction IC
4 of 10
Notice: The information in this document is subject to change without notice.
Electrical Characteristics
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
VIL
Input LOW Voltage
1
0.8
V
VIH
Input HIGH Voltage
1
2.0
V
IIL
Input LOW Current
VIN = 0V
50
µA
IIH
Input HIGH Current
VIN = VDD
100
µA
VOL
Output LOW Voltage
2
IOL = 8mA
0.4
V
VOH
Output HIGH Voltage
2
IOH = -8mA
2.4
V
IDD
Supply Current
Unloaded outputs
14
mA
Zo
Output Impedance
23
Note: 1. REF input has a threshold voltage of VDD/2
2. Parameter is guaranteed by design and characterization. Not 100% tested in production
Switching Characteristics
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
1/t1
Output Frequency
30pF load
4
20
MHz
Duty Cycle
2 = (t2 / t1) * 100
Measured at VDD/2
40
50
60
%
t3
Output Rise Time
1,2
Measured between 0.8V and 2.0V
2.5
nS
t4
Output Fall Time
1,2
Measured between 2.0V and 0.8V
2.5
nS
t5
Output-to-output skew
2
All outputs equally loaded
250
pS
t6
Delay, REF Rising Edge to
CLKOUT Rising Edge
2
Measured at VDD /2
±350
pS
t7
Device-to-Device Skew
2
Measured at VDD/2 on the CLKOUT pins
of the device
700
pS
tJ
Cycle-to-cycle jitter
2
Loaded outputs
200
pS
tLOCK
PLL Lock Time
2
Stable power supply, valid clock presented
on REF pin
1.0
mS
Note: 1. All parameters specified with loaded outputs.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production



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