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PO100HSTL11A Datasheet(PDF) 5 Page - Potato Semiconductor Corporation |
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PO100HSTL11A Datasheet(HTML) 5 Page - Potato Semiconductor Corporation |
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5 / 6 page ![]() Packaging Mechanical Drawing: 8 pin SOIC Copyright © 2006, Potato Semiconductor Corporation 5 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS .0040 .0098 SEATING PLANE .013 .020 .050 BSC 1 8 .149 .157 3.78 3.99 .189 .196 4.80 5.00 1.27 .016 .026 1.35 1.75 0.406 0.660 0.330 0.508 0.10 0.25 .053 .068 REF .016 .0075 .0098 .0099 .0196 0-8˚ .050 .2284 .2440 5.80 6.20 0.40 1.27 0.19 0.25 0.25 0.50 x 45˚ 2.4V -3.6V Differential inputs to HSTL outputs Clock Buffer PO100HSTL11A 1 to 2 Differential Clock/Data Fanout Buffer 02/11/07 Packaging Mechanical Drawing: 8 pin TSSOP X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS SEATING PLANE 8 |
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