TRF2020

SYNTHESIZER FOR GLOBAL SYSTEM

FOR MOBILE (GSM) CELLULAR TELEPHONES

SLWS020B – FEBRUARY 1995 – REVISED JANUARY 1998

21

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

auxiliary-1 prescaler (continued)

The speed-up total-time duration of the auxiliary synthesizer boost charge pumps is defined as follows:

TIME

AUX–SP

+ 2

G

1

f

ref

,

where 1

The speed-up mode of both auxiliary synthesizers is controlled by field G in Word-1, although each auxiliary

synthesizer has its own independent speed-up mode counter.

auxiliary-2 prescaler

Auxiliary-2 prescaler coefficients are defined by Word-2 at address 10.

The total division of the auxiliary-2 synthesizer prescaler is defined as follows:

where 7

† The above equation defines a synthesizer operation where contiguous channels exist for all combinations of H and J. If J < 7, the synthesizer

no longer provides contiguous channels. In either case, it is important that the value assigned to H is never greater than the value assigned to

J.

reference divider postscalers

Each synthesizer section is referenced to the main reference divider through a selectable divide-by-1, -2, -4,

or -8 postscaler (see the reference divider section below). Selection of the additional 1, 2, 4, or 8 division is

determined by the state of bits L, M, and N, as depicted in Word-2 as follows:

Additional Postscaler Division

N1, M1, OR L1

N0, M0, OR L0

ADDITIONAL DIVISION

0

0

1

0

1

2

1

0

4

1

1

8

reference divider

The reference divider coefficients are defined by Word-3 at address 11. The total division of the 11-bit reference

counter is defined as follows:

TOTAL

REF

+ 1

P

,

where 1

power enable

Each synthesizer section can be enabled/disabled by manipulation of fields R, S, and T of Word-3. The

appropriate synthesizer section is enabled if a logic one (1) is written to the appropriate field.