MCP4725 datasheet(21/50 Pages) MICROCHIP

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DS22039D-page 21

MCP4725

5.6

Non-Volatile EEPROM Memory

The MCP4725 device has a 14-bit wide EEPROM

memory to store configuration bit (2 bits) and DAC

input data (12 bits). These bits are readable and re-

writable with I2C interface commands. The device has

an on-chip charge pump circuit to write the EEPROM

memory bits without using an external program

voltage.

The EEPROM writing operation is initiated when the

device receives an EEPROM write command (C2 = 0,

C1 = 1, C0 = 1). The configuration and writing data bits

are transferred to the EEPROM memory block. A

status bit, RDY/BSY, stays low during the EEPROM

writing and goes high as the write operation is

completed. While the RDY/BSY bit is low (during the

EEPROM writing), any new write command is ignored

(for EEPROM or DAC register). Table 5-3 shows the

EEPROM bits and factory default settings. Table 5-4

shows the DAC input register bits of the MCP4725.

TABLE 5-4:

DAC REGISTER

TABLE 5-3:

EEPROM MEMORY AND FACTORY DEFAULT SETTINGS

(TOTAL NUMBER OF BITS: 14 BITS)

Bit

Name

PD1

PD0

D11

D10

Bit

Function

Power-Down

Select

(2 bits)

DAC Input Data (12 bits)

Factory

Default

Value

00 (1)

1 (2)

000

0000

000

Note 1: See Table 5-2 for details.

2: Bit D11 = ‘1’ (while all other bits are “0”) enables the device to output 0.5 * VDD (= middle scale output).

Bit

Name

C2 C1 C0

RDY/

BSY

POR PD1 PD0 D11 D10 D9D8D7 D6D5D4D3 D2 D1D0

Bit

Function

Command

Type

(1)

Power-

Down

Select

Data (12 bits)

Note 1: Write EEPROM status indication bit (0:EEPROM write is not completed. 1:EEPROM write is complete.)

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