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ATA6661 Datasheet(PDF) 9 Page - ATMEL Corporation |
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ATA6661 Datasheet(HTML) 9 Page - ATMEL Corporation |
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9 / 16 page ![]() 9 4729M–AUTO–02/09 ATA6661 6. Electrical Characteristics 5V < V S < 18V, Tamb = –40°C to +125°C No. Parameters Test Conditions Pin Symbol Min. Typ. Max. Unit Type* 1V S Pin 1.1 Nominal DC voltage range 7 V S 5 13.5 18 V A 1.2 Supply current in sleep mode Sleep mode Vlin > VBatt – 0.5V V Batt < 14V 7IVSstby 10 20 µA A 1.3 Supply current in normal mode Bus recessive 7 I VSrec 1.6 3 mA A 1.4 Bus dominant Total bus load > 500 Ω 7IVSdom 1.6 3 mA A 1.5 V S undervoltage threshold V Sth 44.6 5 V A 1.6 V S undervoltage threshold hysteresis 7V Sth_hys 0.2 V A 2 RXD Output Pin (Open Drain) 2.1 Low level input current Normal mode V LIN = 0V, VRXD = 0.4V 1I RXDL 25 8 mA A 2.2 RXD saturation voltage 5 k Ω pull-up resistor to 5V 1 Vsat RXD 0.4 V A 2.3 High level leakage current Normal mode V LIN = VBAT, VRXD = 5V 1IRXDH –3 +3 µA A 2.4 ESD zener diode I RXD = 100 µA 1 VZ RXD 6.1 8.6 V A 3 TXD Input Pin 3.1 Low level voltage input 4 V TXDL –0.3 +0.8 V A 3.2 High level voltage input 4 VTXDH 26 V A 3.3 Pull-down resistor VTXD = 5V 4 RTXD 125 250 600 k Ω A 3.4 Low level leakage current VTXD = 0V 4 ITXD –3 +3 µA A 3.5 Low-level input current at local wake-up request Pre-normal mode VLIN = VBAT; VWAKE = 0V 4I TXDwake 25 8 mA A 4EN Input Pin 4.1 Low level voltage input 2 VENL –0.3 +0.8 V A 4.2 High level voltage input 2 VENH 26 V A 4.3 Pull-down resistor VEN = 5V 2 REN 125 250 600 k Ω A 4.4 Low level input current VEN = 0V 2 IEN –3 +3 µA A 4.5 Enable negative slope for go to sleep Negative slope V EN =2Vto0.8V 2SlopeEN 60 µs A 5 INH Output Pin 5.1 High level voltage Normal mode IINH = –200 µA 8VINHH VS – 0.8 VS VA 5.2 High level leakage current Sleep mode VINH = 27V, VBatt = 27V 8I INHL –3 +3 µA A 6 WAKE Pin 6.1 High level input voltage 3 VWAKEH V S – 1V V S + 0.3V VA 6.2 Low level input voltage I WAKE = Typically –3 µA 3 V WAKEL –27V V S – 3V VA *) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter |
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