WM8192

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WOLFSON MICROELECTRONICS LTD

PP Rev 1.0 June 2000

12

OUTPUT FORMATS

The digital data output from the ADC is available to the user in 8 or 4-bit wide multiplexed formats by

setting control bit MUXOP. Latency of valid output data with respect to VSMP is programmable by

writing to control bits DEL[1:0]. The latency for each mode is shown in the Operating Mode Timing

Diagrams section.

Figure 9 shows the output data formats for Modes 1 – 2 and 4 – 6. Figure 10 shows the output data

formats for Mode 3. Table 1 summarises the output data obtained for each format.

MCLK

4+4+4+4-BIT

OUTPUT

AB

AB

C

D

8+8-BIT

OUTPUT

MCLK

4+4+4+4-BIT

OUTPUT

AB

8+8-BIT

OUTPUT

AB

C D

AB

Figure 9 Output Data Formats

(Modes 1

− 2, 4 − 6)

Figure 10 Output Data Formats

(Mode 3)

OUTPUT

FORMAT

MUXOP

OUTPUT

PINS

OUTPUT

8+8-bit

multiplexed

0

OP[7:0]

A = d15, d14, d13, d12, d11, d10, d9, d8

B = d7, d6, d5, d4, d3, d2, d1,d0

4+4+4+4-bit

(nibble)

1

OP[7:4]

A = d15, d14, d13, d12

B = d11, d10, d9, d8

C = d7, d6, d5, d4

D = d3, d2, d1, d0

Table 1 Details of Output Data Shown in Figure 9 and Figure 10.