ADA4320-1

Rev. 0 | Page 2 of 16

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Logic Inputs (TTL-/CMOS-Compatible Logic)....................... 4

Timing Requirements .................................................................. 5

Absolute Maximum Ratings............................................................ 6

Thermal Resistance ...................................................................... 6

Maximum Power Dissipation ..................................................... 6

ESD Caution.................................................................................. 6

Pin Configuration and Function Descriptions............................. 7

Typical Performance Characteristics ............................................. 8

Applications Information .............................................................. 11

General Applications ................................................................. 11

Circuit Description .................................................................... 11

Programming.............................................................................. 11

Current Level and Gain Adjustment ....................................... 11

Power Saving Features ............................................................... 12

Input Bias, Impedance, and Termination................................ 12

Output Bias, Impedance, and Termination ............................ 12

Power Supply............................................................................... 12

Signal Integrity Layout Considerations................................... 12

Initial Power-Up ......................................................................... 12

R

AMP Pin Feature...................................................................... 13

Output Transformer................................................................... 13

Outline Dimensions ....................................................................... 14

Ordering Guide .......................................................................... 14

REVISION HISTORY

4/10—Revision 0: Initial Version