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XRP7708 Datasheet(PDF) 13 Page - Exar Corporation |
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XRP7708 Datasheet(HTML) 13 Page - Exar Corporation |
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13 / 27 page ![]() X XR RP P7 77 70 08 8 Q Qu ua ad d C Ch ha an nn ne ell D Diig giitta all P PW WM M S Stte ep p D Do ow wn n C Co on nttrro olllle err © 2010 Exar Corporation 13/27 Rev. 1.0.3 Fig. 17: Power Up Sequence INTERNAL LDO POWER-UP PHASE – PHASE 1 When the ENABLE pin is set, internal VCC and VDD power up upon the power up of VIN1. Once the bandgap reference is stable and VCC and VDD fall into the acceptable range, an internal VDDOK flag is generated. A SYS_RESET remains low for a few clock cycles to reset all the internal registers. After that the internal CONFIGURATION_TRANSFER signal raises high and the chip transits to the second phase. CONFIGURATION TRANSFER PHASE – PHASE 2 In this phase, the contents in the configuration memory are transferred to the internal registers. The internal oscillator switches to the programed switching frequency. The GPIO pins are properly configured as either inputs or outputs. If the chip is programmed to run in the I2C mode, GPIO4 and GPIO5 are configured to serve as SDA and SCL for the I2C bus. If chip is programmed to run in the NON-I2C mode, then these two pins can be used as GPIO4 and GPIO5 respectively. CHIP READY PHASE – PHASE 3 In this phase, the chip is ready for normal operation. An internal CHIP_READY flag goes high and enables the I2C to acknowledge the Host’s serial commands. Channels that are configured as always-on channels are enabled. Channels that are configured to be enabled by GPIOs are also enabled if the respective GPIO is asserted. STANDBY LOW DROP-OUT REGULATOR This 100mA low drop-out regulator can be programmed as 3.3V or 5V in SET_STBLDO_EN_CONFIG register. Its output is seen on the LDOOUT Pin. This LDO is fully controllable via the Enable Pin (configured to turn on as soon as power is applied), a GPIO, and/or I2C communication. ENABLING, DISABLING AND RESET The XRP7708 is enabled via raising the ENABLE Pin high. The chip can then be disabled by lowering the same ENABLE Pin. There is also the capability for resetting the Chip via an I2C SOFTRESET Command. For enabling a specific channel, there are several ways that this can be achieved. The chip can be configured to enable a channel at start-up as the default configuration residing in the non-volatile configuration memory of the IC. The channels can also be enabled using GPIO pins and/or an I2C VDDOK SYS_RESET VCC VIN1 VDD CONFIG_TRANSFER CHIP_READY ENABLE_PIN Phase 2 Phase 1 Phase 3 |
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