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PCF8564AU/10AA/1 Datasheet(PDF) 34 Page - NXP Semiconductors |
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PCF8564AU/10AA/1 Datasheet(HTML) 34 Page - NXP Semiconductors |
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34 / 44 page  PCF8564A_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 1 — 8 October 2009 34 of 44 NXP Semiconductors PCF8564A Real time clock and calendar 17. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling Metal-Oxide Semiconductor (MOS) devices ensure that all normal precautions are taken as described in JESD625-A, IEC 61340-5 or equivalent standards. Fig 29. Alignment marks of all PCF8564A types Table 33. Alignment marks of all PCF8564A types All x/y coordinates represent the position of the REF point (see Figure 29) with respect to the center (x/y = 0) of the chip; see Figure 27 and Figure 28. Alignment markers Size ( µm) X ( µm) Y ( µm) C1 100 × 100 465.2 −826.3 C2 100 × 100 −523.0 890.0 F90 × 117 −569.9 −885.5 REF REF C2 C1 F 013aaa036 REF |
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