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116A Datasheet(PDF) 91 Page - Renesas Technology Corp

Part # 116A
Description  RENESAS MCU
PDF  102 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

116A Datasheet(HTML) 91 Page - Renesas Technology Corp

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REJ03B0297-0100
Rev.1.00
Page 91 of 99
Jul 16, 2010
R32C/116A Group
5. Electrical Characteristics
VCC =3.3 V
Switching Characteristics (VCC = 3.0 to 3.6 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)
Notes:
1.
The value is calculated by the following formulas based on the base clock cycles (tc(Base)) and
respective cycles of Tsu(A-R), Tw(R), Tsu(A-W), and Tw(W) set by registers EBC0 to EBC3. If the
calculation results in a negative value, modify the value to be set. For the details of how to set values,
refer to the User’s manual.
tsu(S-ALE) = tsu(A-ALE) = (Tsu(A-R) - 1) × tc(Base) -15 [ns] (when Tsu(A-R) is greater than 1)
tsu(S-ALE) = tsu(A-ALE) = 0.5 × tc(Base) -15 [ns] (when Tsu(A-R) is 1)
tw(ALE) = (Tsu(A-R) - 1) × tc(Base) - 20 [ns] (when Tsu(A-R) is greater than 1)
tw(ALE) = 0.5 × tc(Base) - 20 [ns] (when Tsu(A-R) is 1)
tw(R) = Tw(R) × tc(Base) -10 [ns]
tw(W) = tsu(D-W) = Tw(W) × tc(Base) -10 [ns]
2.
When Tsu(A-R) is greater than 1 or Tsu(A-W) is greater than 1. Change “tc(Base)” to “0.5 × tc(Base)
when Tsu(A-R) is 1 or Tsu(A-W) is 1.
Table 5.62
External Bus Timing (Multiplexed bus)
Symbol
Characteristic
Measurement
condition
Value
Unit
Min.
Max.
tsu(S-ALE)
Chip-select setup time for ALE
Refer to
Figure 5.6
(1)
ns
th(R-S)
Chip-select hold time after read
1.5 × tc(Base) - 15
ns
tsu(A-ALE)
Address setup time for ALE
(1)
ns
th(ALE-A)
Address hold time after ALE
tc(Base) - 5 (2)
ns
th(R-A)
Address hold time after read
1.5 × tc(Base) - 15
ns
td(ALE-R)
ALE-read delay time
tc(Base) - 5 (2)
tc(Base) + 10 (2)
ns
tw(ALE)
ALE pulse width
(1)
ns
tdis(R-A)
Address disable time after read
8ns
tw(R)
Read pulse width
(1)
ns
th(W-S)
Chip-select hold time after write
1.5 × tc(Base) - 15
ns
th(W-A)
Address hold time after write
1.5 × tc(Base) - 15
ns
td(ALE-W)
ALE-write delay time
tc(Base) - 5 (2)
tc(Base) + 10 (2)
ns
tw(W)
Write pulse width
(1)
ns
tsu(D-W)
Data setup time for write
(1)
ns
th(W-D)
Data hold time after write
0.5 × tc(Base)
ns



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